ARM AMBA NIC-301 Spezifikationen Seite 70

  • Herunterladen
  • Zu meinen Handbüchern hinzufügen
  • Drucken
  • Seite
    / 178
  • Inhaltsverzeichnis
  • LESEZEICHEN
  • Bewertet. / 5. Basierend auf Kundenbewertungen
Seitenansicht 69
Programmers Model
ARM DDI 0503F Copyright © 2012-2013 ARM. All rights reserved. 3-13
ID062813 Non-Confidential
3.3.2 Test chip SCC register summary
Table 3-6 shows the configuration registers and corresponding offsets from the base memory
address. The offsets are also their
board.txt
entries. The configuration process, see Versatile
Express
Configuration Technical Reference Manual, overwrites the test chip or default values
in Table 3-6.
Table 3-6 Test chip SCC register summary
Offset Name Type Test chip reset Width Description
0x000
CFGREG0 RW
0x14FC00FC
32 SMC CS0/1 register.
See Test chip SCC Register 0 on page 3-17.
0x004
CFGREG1 RW
0x1CFC18FC
32 SMC CS2/3 register.
See Test chip SCC Register 1 on page 3-17.
0x008
CFGREG2 RW
0x10FC0CFC
32 SMC CS4/5 register.
See Test chip SCC Register 2 on page 3-18.
0x00C
CFGREG3 RW
0x06FE04FE
32 SMC CS6/7 register.
See Test chip SCC Register 3 on page 3-19.
0x010
CFGREG4 RW
0x000003D0
32 Miscellaneous configuration register 0.
See Test chip SCC Register 4 on page 3-19.
0x014
CFGREG5 RW
0x00001000
32 DMA boot address register.
See Test chip SCC Register 5 on page 3-21.
0x018
CFGREG6 RW
0x1FFFFFFF
32 Reset control register.
See Test chip SCC Register 6 on page 3-22.
0x01C
CFGREG7 RO
0x07230477
32 DAP ROM default target ID register.
See Test chip SCC Register 7 on page 3-25.
0x020
CFGREG8 RO
0x00000000
32 DAP ROM default instance ID register.
Test chip SCC Register 8 on page 3-26.
0x03C
-
0X024
----Reserved.
Do not write to or read from these registers.
0x040
CUSTOMER_ID RO
0x10041002
32 Revision, designer ID and part number information
register.
See Test chip SCC CUSTOMER_ID Register on
page 3-26.
0x0FC
-
0X044
----Reserved.
Do not write to or read from these registers.
0x100
CFGREG11 RW
0x0110C900
32 Clock control register.
Test chip SCC Register 11 on page 3-27.
0x104
CFGREG12 RW
0x00000000
32 Clock status register.
Test chip SCC Register 12 on page 3-30.
0x108
CFGREG13 RW
0x022F10000
32 SYS PLL control register.
See Test chip SCC Registers 13, 15, 17, 19, 23, and 25
PLL control registers on page 3-31.
Seitenansicht 69
1 2 ... 65 66 67 68 69 70 71 72 73 74 75 ... 177 178

Kommentare zu diesen Handbüchern

Keine Kommentare