
Electrical Specifications
ARM DDI 0503F Copyright © 2012-2013 ARM. All rights reserved. C-2
ID062813 Non-Confidential
C.1 AC characteristics
Table C-1 shows the recommended AC operating characteristics for the Cortex-A15 MPCore
test chip.
For more information on each interface that Table C-1 describes, see the appropriate technical
reference manual in Additional reading on page ix.
Table C-1 AC characteristics
Interface Parameter Symbol Minimum Maximum Description
Multiplexed master AXI
port
Clock cycle T
MXMIFcyc
25ns - Cmax=47.8pF
Cmin=23.88pF
Output valid time before clock edge T
MXMIFov
- 6.086ns
Output hold time after clock edge T
MXMIFoh
2.708ns
Input setup time to clock edge T
MXMIFis
- 10.522ns
Input hold time after clock edge T
MXMIFih
6.366ns -
Trace Clock cycle T
TRACEcyc
7.140ns - Cmax=22.5pF
Cmin=16.5pF
JTAG Clock cycle T
JTAGcyc
40ns - Cmax=48.5pF
Cmin=10.5pF
Output valid time before clock rising edge T
JTAGov
- 15.428ns
Output hold time after clock rising edge T
JTAGoh
1.070ns -
Input setup time to clock rising edge T
JTAGis
- 36.568ns
Input hold time after clock rising edge T
JTAGih
1.314ns -
SMC Clock cycle T
SMCcyc
20ns - Cmax=47.8pF
Cmin=23.88pF
Output valid time before clock rising edge T
SMCov
- 5.241ns
Output hold time after clock rising edge T
SMCoh
8.620ns -
Input setup time to clock edge T
SMCis
- 12.896ns
Input hold time after clock rising edge T
SMCih
4.737ns -
HDLCD Clock cycle T
HDLCDcyc
6ns - Cmax=47.8pF
Cmin=23.88pF
Output valid time before clock rising edge T
HDLCDov
- 1.556ns
Output hold time after clock rising edge T
HDLCDoh
2.696ns -
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