ARM Cortex-M3 Betriebsanweisung Seite 94

  • Herunterladen
  • Zu meinen Handbüchern hinzufügen
  • Drucken
  • Seite
    / 137
  • Inhaltsverzeichnis
  • LESEZEICHEN
  • Bewertet. / 5. Basierend auf Kundenbewertungen
Seitenansicht 93
Embedded Trace Macrocell
ARM DDI 0337I Copyright © 2005-2008, 2010 ARM Limited. All rights reserved. 10-8
ID072410 Non-Confidential
10.2.9 Operation
ETM-M3 implements version 3.5 of the ARM Embedded Trace Macrocell protocol.
Table 10-5 Trigger output connections
Trigger bit
Destination
signal
Destination
device
Comments
[7] User defined - -
[6] User defined - -
[5] ETMEXTIN[1] ETM Compulsory if ETM is present.
[4] ETMEXTIN[0] ETM Compulsory if ETM is present.
[3] INTISR[y] NVIC Recommended if an ETB is present. If multiple cores share a
single ETB, you must only connect to the CTI of one of the cores.
[2] INTISR[x] NVIC Compulsory. Any interrupt can be used.
[1] User defined - -
[0] EDBGRQ Core Compulsory.
Seitenansicht 93
1 2 ... 89 90 91 92 93 94 95 96 97 98 99 ... 136 137

Kommentare zu diesen Handbüchern

Keine Kommentare