ARM Cortex R4F Bedienungsanleitung Seite 11

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© G.N. Khan ARM Processors/Cores – EE8205: Embedded Computer Systems Page: 11
ARM7 Architecture
Load/store architecture
Most instructions are RISCy
Some multi-register operations take multiple cycles
All instructions can be executed conditionally
ARM7 is a small, low power, 32-bit microprocessor.
Three-stage pipeline, each stage takes one clock cycle
Instruction fetch from memory
Instruction decode
Instruction execution.
Register read
A shift applied to one operand and the ALU operation
Register write
This limits the CPU max clock speed to around 80 MHz on a 0.35-
micron silicon process.
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